Special Session Organization:

Special session on EU-funded research project in the area of reconfigurable multi-core systems at the Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2011 - (http://www.lirmm.fr/~marchesan/recosoc2011/)). Session organized and chaired by Michael Huebner (KIT) and João M. P. Cardoso (UPORTO).
Special Session on Reconfigurable Computing Trends, at the 9th IEEE Intl. Conf. on Industrial Informatics (INDIN’2011), July 26-29, 2011, Caparica, Lisbon, Portugal. Session organized and chaired by João M. P. Cardoso (UPORTO), Michael Huebner (KIT), and Luis Gomes (UNINOVA).
Chairing of Special Workshop Session entitled: “How to Effectively Program Reconfigurable Multi-Core Embedded Systems?” at the 2011 Intl. Conference on Engineering Reconfigurable Systems and Algorithms (ERSA’11) (http://www.ersaconf.org/ersa11/). This special session was devoted to EU-Funded Projects and chaired by Pedro C. Diniz (INESC-ID).
Workshop co-organization on EU-funded projects at the 2011 Intl. Conference on Field-Programmable Logic and Applications (FPL), held in Chania, Crete, by João M. P. Cardoso (UPORTO) and Cristina Silvano (Politecnico di Milano). Participation in the panel by Pedro Diniz (INESC-ID) and moderation of the panel by Michael Hübner (KIT).
Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012 in Paris as part of the HiPEAC Conference. This workshop was organized by João M. P. Cardoso (UPORTO) and Michael Hübner (KIT) as General Co-chairs and involved REFLECT members in its committee (Zlatko Petrov, HON).
Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems at the SAMOS XII Intl. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII) Samos, Greece, July 2012. This event was co-organized by Pedro C. Diniz (INESC-ID) and Dr. Diana Göhringer from Karlsruhe Institute of Technology (KIT).

Special Event Organization:

Fall School in Zollernblick, Germany from Oct. 2, 2012 to Oct. 6, 2012 where the REFLECT tool chain was presented to a wider audience. Included in the agenda for this event were a series of presentations and tutorials from the various elements of the REFLECT consortium. Details of the sections are described in the deliverable D.6.2. See also the Agenda for this meeting at the URL: http://www.i-paco.com/fall_school_forest_2012/#home.

Project Presentations (Regular presentations, Posters and Demos):

REFLECT Project Poster presentation at the HiPEAC Systems Week, Edinburgh, UK, May 2nd – May 5th, 2010.

Presentation by Zlatko Petrov (HON), at the HiPEAC Innovation Event, Edinburgh, UK, May 2nd – May 5th, 2010. The title of the presentation was: “Rendering FPGAs to Multi-Core Embedded Computing”
João M.P. Cardoso (UPORTO) and Pedro C. Diniz (INESC-ID), presentation at the Friday Workshop on “The European landscape of reconfigurable computing: Lessons learned, new perspectives and innovations”, March 12, 2010, Dresden, Germany. The title of the presentation was "Rendering FPGAs to Multi-Core Embedded Computing".
Pedro C. Diniz (INESC-ID), presentation of the paper: Pedro C. Diniz, Marco Danelutto, Denis Barthou, Marc Gonzales, and Michael Hübner, “High Performance Architectures and Compilers”, This paper was presented at the European Conference on Parallel Processing (Euro-Par) 2010, Ischia, Italy, August 31 - September 3, 2010.
Presentation by João M.P. Cardoso (UPORTO), at the Compilation Cluster, HiPEAC Computing Systems week Barcelona, Spain, October 20, 2010. The title of the presentation was “Rendering FPGAs to Multi-Core Embedded Computing”.
REFLECT Project Poster presentation at Intl Conference on Design, Automation and Testing in Europe (DATE - http://www.date-conference.com/), in Dresden, Germany, Mar. 2011.
REFLECT project partners demonstrated the LARA design-flow and the 3D Path Planning application at the REFLECT project exhibition booth at DATE’2012, March 13-15, 2012, Dresden, Germany.
Presentation of the REFLECT Project at the Special Session on EU-Funded Research Projects at the Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2011 - (http://www.lirmm.fr/~marchesan/recosoc2011/)) by Dr. Pedro Diniz (INESC-ID) entitled “Rendering FPGAs to Multi-Core Embedded Computing (REFLECT) – Project Overview and Status”.
Poster presentation at DAC 2011 by Razvan Nane (TUD), entitled “DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks”.
Participation in the “Demo Night” with the contributions of all project partners at the 2011 Intl. Conference on Field-Programmable Logic and Applications (FPL’11), held in Chania, Crete. In particular José Gabriel Coutinho (ICSTM) presented a 3-hour long demonstration of the tool-chain.
Workshop at the Faculty of Electrical Engineering, Mathematics and Computer Science at TU Delft on “The REFLECT Tool-chain on the ML510”. This workshop was presented by Vlad-Mihai Sima on Oct. 31, 2011 and had a participation of 12 2nd year M.Sc. Engineering students.
Presentation by Pedro C. Diniz (INESC-ID) in the Reconfigurable Computing Cluster session as part of the HiPEAC Computing Systems Week in Barcelona, Spain on Nov. 04, 2011. The title of the presentation was: “The REFLECT Project – Using Aspects and Strategies for Design-Space-Exploration”.
Presentation by João M. P. Cardoso (UPORTO) in the Design and Simulation Cluster session as part of the HiPEAC Computing Systems Week in Barcelona, Spain on Nov. 04, 2011. The title of the presentation was: “LARA – An Aspect-oriented Domain-Specific Language to Control and Guide Design Flows”.
Zlatko Petrov (HON), presentation entitled: “REFLECT's Approach for Specification and Implementation of Safety Requirements,” at the Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012 in Paris as part of the HiPEAC Conference.
José G. Coutinho (ICSTM), presentation entitled: “REFLECT's Approach for Code Instrumentation and Strategies Using LARA,” at the Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012 in Paris as part of the HiPEAC Conference.
Ali Azarian (OPORTO), presentation of the poster: Ali Azarian (OPORTO) and João M. P. Cardoso (OPORTO), "Task-level Pipelining in Multi-Core Configurable Architectures". This poster presentation was part of the poster session at the HiPEAC Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012.
Ricardo Nobre (INESC-ID), presentation of the poster: Ricardo Nobre (INESC-ID), João M. P. Cardoso (OPORTO) and Pedro C. Diniz (INESC-ID) entitled "MATLAB to C Conversion Targeting Embedded Computing Systems". This poster presentation was part of the poster session at the HiPEAC Conference, and of the poster session at the HiPEAC Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012.
Tiago Carvalho (OPORTO), presentation of the poster: Tiago Carvalho (OPORTO), Sérgio Durand (OPORTO), João M. P. Cardoso (OPORTO), José Gabriel Coutinho (ICSTM), Ricardo Nobre (INESC-ID), Pedro C. Diniz (INESC-ID), Wayne Luk (ICSTM) and Zlatko Petrov (Honeywell) "LARA: An Aspect-oriented Approach for Developing and Designing Embedded Systems". This poster presentation was part of the poster session at the HiPEAC Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2012) on January 25th 2012.
REFLECT project partners demonstrated the LARA design-flow at the Research Project Exhibit on January 25th 2012 in Paris as part of the HiPEAC Conference.
João Vilela Teixeira (UPORTO), Presentation of the paper: João Vilela Teixeira, Jose C. Alves, João M. P. Cardoso, and Zlatko Petrov, “Hardware acceleration of a Stereo Navigation application with high-level C to HW synthesis,” In VIII Jornadas sobre Sistemas Reconfiguráveis (REC’2012), 9–10 de Fevereiro de 2012, Instituto Superior de Engenharia de Lisboa, Lisboa, Portugal. [long paper].
Ricardo Nobre (INESC-ID), presentation of the poster: Ricardo Nobre (INESC-ID), Tiago Carvalho (UPORTO), João M. P. Cardoso (UPORTO) and Pedro C. Diniz (INESC-ID), "A Domain-Specific Aspect Language for MATLAB and its Strategic Programming Weaver," in DATE’2012, Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany.
Tiago Carvalho (UPORTO), presented the poster: Tiago Carvalho (UPORTO), Sérgio Durand (UPORTO), Ricardo Nobre (INESC-ID), José Gabriel Coutinho (ICSTM), Joao M. P. Cardoso (OPORTO) and Pedro C. Diniz (INESC-ID), "Design Space Exploration for FPGA-based Systems using LARA", in DATE 2012 Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany.
Tiago Carvalho (UPORTO) and João M. P. Cardoso (UPORTO), presented REFLECT demos in two AOSD’12 demo sessions, entitled "Experiments with the LARA Aspect-Oriented Approach", held on March 28 and March 30, 2012 in Potsdam, Germany as part of the 2012 Intl. Conference on Aspect-Oriented Software development (AOSD’12).
José C. Alves (UPORTO), presented the poster: João Teixeira (UPORTO), Ali Azarian (UPORTO), João M. P. Cardoso (UPORTO), and José C. Alves (UPORTO), FPGA-based High-Level Design Strategies to Accelerate a 3D Path Planning Algorithm, DATE’2012, Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany.
Poster presentation by João M. P. Cardoso (UPORTO), “REFLECT Technical Approach,” at the Poster Session devoted to Ongoing EU Projects held as part of the 23rd IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP’2012), Delft, The Netherlands, July 9-11, 2012.
Pedro C. Diniz presented the REFLECT project at the Special Session on EU-funded research projects at the IEEE Intl. Symp. on VLSI, held in Amherst, Mass., USA on August 19, 2012.
J. Bispo, J. M. P. Cardoso, and J. C. Monteiro, “Hardware Pipelining of Runtime-Detected Loops,” in 25th Symp. on Integrated Circuits and Systems Design (SBCCI’12), Brazil, Aug. 30 – Sept. 2, 2012.
Prof. João M. P. Cardoso introduced the main LARA technology and used the reflectc compiler to show code transformations and compiler optimizations to the students of the PhD course: SCAM - Source code analysis and manipulation, November 6th, 2013, Departamento de Electrónica, Telecomunicações e Informática, sala 102, Aveiro, Portugal. in the context of MAP-i (a joint PhD program of University of Aveiro, University of Minho, and University of Porto),
José Sá, João C. Ferreira, and José C. Alves, "FPGA Implementation of Autonomous Navigation Algorithm with Dynamic Adaptation of Quality of Service" submitted to the 9th Portuguese Meeting on Reconfigurable Systems, February 2013, Coimbra, Portugal.
José G. F. Coutinho (ICTSM) presented the paper: José G. F. Coutinho, Sujit Bhattacharya, Wayne Luk, George A. Constantinides, João M. P. Cardoso, Tiago Carvalho, Pedro C. Diniz, and Zlatko Petrov, “Resource-Efficient Designs using an Aspect-Oriented Approach,” in 10th IEEE/IFIP International Conf. on Embedded and Ubiquitous Computing (EUC’2012), Dec. 5-7, Paphos, Cyprus.
José G. F. Coutinho (ICTSM) presented a demo (REFLECT design-flow) at the 10th IEEE/IFIP International Conf. on Embedded and Ubiquitous Computing (EUC’2012), Dec. 5-7, Paphos, Cyprus.
André Santos (INESC-ID/UP) presented the paper: André Santos, João M. P. Cardoso, Pedro Diniz, Diogo Ferreira, Zlatko Petrov, “A Domain-Specific Language for Run-time Adaptation for Embedded Systems,” in 10th IEEE International Conference on Embedded Computing (Embedded-2012), Dec 17-19, Changzhou, Jiangsu, China.
Posters and demo presentations at the DATE2013 (http://www.date-conference.com/) workshop DEPCP2013, Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, (http://conferenze.dei.polimi.it/depcp/)
Zlatko Petrov (HON), presentation entitled: “REFLECT Final Achievements and Results,” at the Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM2013) on January 22nd 2013 in Paris as part of the HiPEAC Conference.
Posters and demo presentations at the HiPEAC workshop: DITAM2013 (http://www.fe.up.pt/ditam2013).
Ali Azarian (UP) will present the paper: Ali Azarian, João M. P. Cardoso, Stephan Werner, Juergen Becker, “An FPGA-based Multi-Core Approach for Pipelining Computing Stages,” in 28th ACM Symposium on Applied Computing (SAC'13), EMBS (Embedded Systems: Advances along the Hardware/Software Borderline) Track, Coimbra, Portugal, March 18-22, 2013.

Nuno Paulino (UP) is expected to present the paper: Nuno Paulino, João Canas Ferreira, and João M. P. Cardoso, “Architecture for Transparent Binary Acceleration of Loops with Memory Accesses,” in 9th International Symposium on Applied Reconfigurable Computing (ARC’2013), March 25-27, 2013, Los Angeles, USA. (to appear).

Keynote/Invited Presentations:

Invited presentation by Zlatko Petrov (HON) at the 7th Portuguese Meeting on Reconfigurable Systems (REC 2011 http://paginas.fe.up.pt/~rec2011/), Feb. 2011. The title of his presentation was: “Rendering FPGAs to Multi-Core Embedded Computing (REFLECT)”
Keynote presentation in the Special Session devoted to EU-funded Research Project in the area of Reconfigurable Computing. This presentation was part of the 2011 Intl. Conference on Engineering Reconfigurable Systems and Algorithms (ERSA’11) (http://www.ersaconf.org/ersa11/). Presentation by João M. P. Cardoso presented the contribution entitled "A New Approach to Control and Guide the Mapping of Computations to FPGAs".
Invited presentation at the Conference on Design of Circuits and Integrated Systems (DCIS http://paginas.fe.up.pt/~dcis2011/) where the REFLECT was featured, by Pedro C. Diniz (INESC-ID).
Invited keynote presentation by Wayne Luk (Imperial College) at the Intl. Conf. on Field Programmable Technology (FPT'11, http://www.cse.iitd.ac.in/~icfpt11/) on 12 December 2011. The title of his presentation was: "Field-Programmable Technology: the Next Ten Years and Beyond".
Invited presentation by João M. P. Cardoso (UPORTO), entitled, “The LARA Approach for Specifying Performance-Oriented Compilation Strategies,” In VIII Jornadas sobre Sistemas Reconfiguráveis (REC’2012), 9–10 de Fevereiro de 2012, Instituto Superior de Engenharia de Lisboa, Lisboa, Portugal. http://www.deetc.isel.pt/rec2012/.
Panel participation by Pedro C. Diniz (INESC-ID), in the panel "Designing and Programming Heterogeneous Many-core Platforms: Challenges and Trends", in DATE’2012, Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany.
Panel participation by Koen Bertels (TU Delft), in the panel “Key Challenges For The Next Generation of Computing Systems Taming the Data Deluge", in DATE’2012, March 15, 2012, Dresden, Germany.
Participation at the DATE 2012 Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany (see the workshop web page at http://www.date-conference.com/conference/session/W3). This workshop had Cristina Silvano (Politecnico di Milano, IT), Giovanni Agosta, (Politecnico di Milano, IT), and João Cardoso (UPORTO, PT) as General Co-Chairs, and involved other two REFLECT members in the organization (Michael Huebner and Juergen Becker, both from KIT).
Pedro C. Diniz (INESC-ID), presented the REFLECT project entitled "Rendering FPGAs to Multi-Core Embedded Computing --- Status, Results and Perspectives" at the DATE 2012 Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 16, 2012, Dresden, Germany (see the workshop web page at http://www.date-conference.com/conference/session/W3).
Invited presentation by Pedro C. Diniz (INESC-ID) at the UCLA's Center for Domain-Specific Computing (CDSC) bi-weekly seminar meeting by invitation of Prof. Jason Cong (EE Department) entitled "Using Aspects for Design-Space Exploration in Reconfigurable Architectures: The REFLECT Project Approach", May 16th, 2012.
Invited presentation by João M. P. Cardoso (UPORTO) entitled " REFLECT: Rendering FPGAs to Multi-Core Embedded Computing " presented at the 23rd IEEE Intl. Conf. on Application-specific Systems, Architectures and Processors (ASAP’2012), Delft, The Netherlands, July 9-11, 2012.
Invited presentation by João M. P. Cardoso (UPORTO) entitled "Programming Strategies for Runtime Adaptability" at the 7th Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'2012), York, UK, July 9-12, 2012.
Panel participation by João M. P. Cardoso (UPORTO) at the “Panel: Maturity of high level synthesis tools - useful ore just another hype?,” as part of the technical program of the 7th Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'2012), York, UK, July 9-12, 2012. (Organized by Diana Goehringer – KIT; Panelists: João M. P. Cardoso – UPORTO, Luigi Carro – UFRGS, Marco D. Santambrogio – Polimi and MIT, Gabriel Marchesan Almeida - KIT).

Conference Presentations and Papers (referred scholarly publications):

Paper presentation: O. Dragomir and K. Bertels, “Loop Distribution for K-Loops on Reconfigurable Architectures”, In Proc. of Design, Automation and Test in Europe 2011 (DATE), Grenoble, France, March 2011.
Paper presentation: D. Theodoropoulos, G. Kuzmanov, G. Gaydadjiev, “A Reconfigurable Audio Beamforming Multi-Core Processor”, In Proc. of the Intl. Symp. on Applied Reconfigurable Computing (ARC), pp. 3-15, Belfast, Ireland, March 2011.
Paper presentation at the 9th IEEE Intl. Conf. on Industrial Informatics INDIN'2011 July 26-29, 2011, Caparica, Lisbon, Portugal (http://www.uninova.pt/indin2011/home/home_i2011.php) entitled “Programming Safety Requirements in the REFLECT Design Flow” authored by Zlatko Petrov (HON), Kamil Kratký (HON), João M. P. Cardoso (UPORTO) and Pedro C. Diniz (INESC-ID).
Paper presentation at conference: S. Ostadzadeh, M. Corina, C. Galuzzi, K. Bertels, Runtime Extraction of Memory Access Information from the Application Source Code, In Proc. of the Intl. Conf. on High Performance Computing & Simulation (HPCS), Istanbul, Turkey, July 2011.
Paper presentation at conference: R. Meeuws, C. Galuzzi, K. Bertels, High Level Quantitative Hardware Prediction Modeling using Statistical Methods, In Proc. of the Intl. Conf. on Embedded Computer Systems: Architectures, Models, and Simulations, pp. 140-149, Samos, Greece, July 2011.
Paper presentation at conference: R. Nane, S van Haastregt, T. Stefanov, B. Kienhuis, V. Sima, K. Bertels, IP-XACT Extensions for Reconfigurable Computing, In proc. of the 22nd IEEE Intl. Conf. on Application-specific Systems, Architectures and Processors (ASAP’11), Santa Monica, USA, Sep. 2011.
João Vilela Teixeira (UPORTO), Presentation of the paper: João Vilela Teixeira, Jose C. Alves, João M. P. Cardoso, and Zlatko Petrov, “Hardware acceleration of a Stereo Navigation application with high-level C to HW synthesis,” In VIII Jornadas sobre Sistemas Reconfiguráveis (REC’2012), 9–10 de Fevereiro de 2012, Instituto Superior de Engenharia de Lisboa, Lisboa, Portugal.
W. Luk (ICSTM) presented the paper by G.C.T. Chow, A.H.T. Tse, Q. Jin, W. Luk, P.H.W. Leong and D.B. Thomas, A mixed precision Monte Carlo methodology for reconfigurable accelerator systems, Proc. ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), pp. 57-66, 2012.
João M. P. Cardoso (UPORTO), presented the paper: João M. P. Cardoso, Tiago Carvalho, José Gabriel de F. Coutinho, Wayne Luk, Ricardo Nobre, Pedro C. Diniz, Zlatko Petrov, “LARA: An Aspect-Oriented Programming Language for Embedded Systems,” in International Conference on Aspect-Oriented Software Development (AOSD’12), Potsdam, Germany, March 25-30, 2012, pp. 179-190.
G. Mariani, V.M. Sima, G. Palermo, V. Zaccaria, C. Silvano, K.L.M. Bertels, "Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures", in Proc. of the Design, Automation & Test in Europe Conference &a type=mp; Exhibition (DATE), pp. 1379-1384, March 2012.
S. A. Ostadzadeh, R. J. Meeuws, I. Ashraf, C. Galuzzi, K.L.M. Bertels, "The Q² Profiling Framework: Driving Application Mapping for Heterogeneous Reconfigurable Platforms", in Proc. of the 8th Intl. Symp. on Applied Reconfigurable Computing (ARC), pp. 76-88, March 2012.
W. Luk (ICSTM) presented an invited presentation entitled “Efficiency and productivity challenges in reconfigurable computing” at the 8th Intl. Symp. on Applied Reconfigurable Computing (ARC).
W. Luk (ICSTM) presented the paper by Q. Liu and W. Luk, Heterogeneous systems for energy efficient scientific computing, Proc. International Conference on Applied Reconfigurable Computing (ARC), pp. 64-75, 2012.
Q. Jin (ICSTM) presented the paper by Q. Jin, D. Dong, A.H.T. Tse, G.C.T. Chow, D.B. Thomas, W. Luk and S. Weston, Multi-level customisation framework for curve based Monte Carlo financial simulations, Proc. International Conference on Applied Reconfigurable Computing (ARC), pp. 187-201, 2012. It won the Best Paper Award.
Pedro C. Diniz (INESC-ID) presented the paper " Hardware/Software Specialization Through Aspects - The LARA Approach", João M. P. Cardoso, Tiago Carvalho, João Teixeira, Pedro C. Diniz, Fernando Gonçalves and Zlatko Petrov, at the Special Workshop Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems at the SAMOS XII Intl. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII) Samos, Greece, July 2012.
I. Ashraf, S. A. Ostadzadeh, R. J. Meeuws, K.L.M. Bertels, "Communication-aware HW/SW Co-design for Heterogeneous Multicore Platforms", In proceedings of the 10th International Workshop on Dynamic Analysis (WODA 2012), pp. 6, Minneapolis, USA, July 2012.
B. Betkaoui, Y. Wang, D.B. Thomas and W. Luk, "A reconfigurable computing approach for efficient and scalable parallel graph exploration", 23rd IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP), Delft, 2012.
T.J. Todman and W. Luk, “Reconfigurable design automation by high-level exploration”, 23rd IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP), Delft, 2012.
"DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler". R. Nane, V.M. Sima, B. Olivier, R. Meeuws, Y. Yankova and K.L.M. Bertels, Proc. of the 22nd International Conf. on Field Programmable Logic and Applications (FPL2012), Oslo, Norway, August 2012.
B. Betkaoui, Y. Wang, D.B. Thomas and W. Luk, “Parallel FPGA-based All Pairs Shortest Paths For Sparse Networks: A Human Brain Connectome Case Study", 22nd International Conf. on Field Programmable Logic and Applications (FPL), Oslo, 2012.
A.H.T. Tse (ICSTM) presented the paper by A.H.T. Tse, G.C.T. Chow, Q. Jin, D.B. Thomas and W. Luk, Optimising performance of quadrature methods with reduced precision, Proc. International Conf. on Applied Reconfigurable Computing (ARC), pp. 251-263, 2012.
Wayne Luk (ICTSM) presented the paper: “Specifying Compiler Strategies for FPGA-based Systems,” by João M. P. Cardoso, João Teixeira, José Alves, Ricardo Nobre, Pedro C. Diniz, José Gabriel de F. Coutinho, Wayne Luk, in Proc. of the IEEE Intl. Symp. on FPGAs for Custom Computing Machines (FCCM), Toronto, Canada, April 30-May 2, 2012.
Wayne Luk (ICSTM) presented the paper: “A Mixed Precision Methodology for Mathematical Optimisation,” by G.C.T. Chow, W. Luk and P.H.W. Leong, in Proc. of the IEEE Intl. Symp. on FPGAs for Custom Computing Machines (FCCM), Toronto, Canada, April 30-May 2, 2012.
S. Werner (KIT) presented the paper: A. Azarian (UPORTO), J. C. Ferreira (UPORTO), S. Werner (KIT), Z. Petrov (HON), J. M. P. Cardoso (UPORTO), M. Huebner (KIT), “Analysis of Error Detection Schemes: Toolchain Support and Hardware/Software Implications”, In NASA/ESA 7th Conf. on Adaptive Hardware and Systems (AHS 2012), Erlangen, Germany, June 2012.
X. Niu, Q. Jin, W. Luk, Q. Liu and O. Pell (ICSTM), “Exploiting Run-time Reconfiguration in Stencil Computation”, 22nd International Conf. on Field Programmable Logic and Applications (FPL), Oslo, 2012.
Q. Jin, T. Becker, W. Luk and D. Thomas (ICSTM), “Optimising Explicit Finite Difference Option Pricing for Dynamic Constant Reconfiguration”, 22nd International Conf. on Field Programmable Logic and Applications (FPL), Oslo, 2012.
T. Todman and W. Luk (ICSTM), “Verification of Streaming Designs by Combining Symbolic Simulation and Equivalence Checking”, 22nd International Conf. on Field Programmable Logic and Applications (FPL), Oslo, 2012.
Zlatko Petrov (HON) presented the paper, "Controlling Hardware Synthesis with Aspects" by João M. P. Cardoso, Tiago Carvalho, José G.F. Coutinho, Pedro C. Diniz, Zlatko Petrov, and Wayne Luk, at the IEEE Intl. Symposium on Digital Systems design (DSD)/ul, Sept. 2012.
Pedro C. Diniz (INESC-ID) presented the paper " Design Space Exploration for High-Accuracy 1-Dimensional Edge Detection " co-authored by José C. Alves (UPORTO) and Paulo J. Pereira at the 27th Intl. Conf. on the Design of Circuits and Integrated Systems (DCIS), held in Avignon, France on November 2012.
Zlatko Petrov, Pavel G. Zaykov, João M. P. Cardoso, José G.F. Coutinho, Pedro C. Diniz, and Wayne Luk, “An Aspect-Oriented Approach for Designing Safety-Critical Systems”, at the IEEE Aerospace Conference, to be held in Big Sky, Montana, USA, Mar 2nd – 9th 2013 (accepted).

Journal Articles:

Article by David Boland and George Constantinides, “Bounding Variable Values and Round-Off Effects Using Handelman Representations”, IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems (TCAD), Vol. 30. Issue: 11, pp. 1691-1704, Nov. 2011.
A.H.T. Tse, D. Thomas and W. Luk (ICSTM), Design exploration of quadrature methods in option pricing, IEEE Transactions on VLSI Systems, vol. 20, no. 5, pp. 818-826, May 2012.
João Bispo, Nuno Paulino, João Canas Ferreira, and João M. P. Cardoso “Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems,” in the IEEE Transactions on Industrial Informatics (to appear).
João M.P. Cardoso, Tiago Carvalho, José G.F. Coutinho, Ricardo Nobre, Razvan Nane, Pedro C. Diniz, Zlatko Petrov, and Wayne Luk, and Koen Bertels, “Controlling a Complete Hardware Synthesis Toolchain with LARA Aspects,” Microprocessors and Microsystems, Elsevier (submitted).
João M. P. Cardoso, João Teixeira, José C. Alves, Ricardo Nobre, José G. F. Coutinho, Pedro C. Diniz, and Wayne Luk, “Specifying Compiler Strategies for FPGA-based Systems,” to be submitted to ACM TRETS (in preparation).
João M. P. Cardoso, Tiago Carvalho, José Gabriel de F. Coutinho, Wayne Luk, Ricardo Nobre, Pedro Cp. Diniz, Fernando Gonçalves, and Zlatko Petrov, “LARA: An Aspect-Oriented Programming Language for Hardware/Software Systems,” to be submitted to ACTM TECS or IEEE TCAD (in preparation).

HiPEAC Magazine:

FP7 REFLECT Project: Rendering FPGAs to Multi-Core Embedded Computing, April 2010
FP7 REFLECT Project: Rendering FPGAs to Multi-Core Embedded Computing, October 2012
REFLECT and 2PARMA Projects’ Fall School, January 2013
pW. Luk (ICSTM) presented the paper by G.C.T. Chow, A.H.T. Tse, Q. Jin, W. Luk, P.H.W. Leong and D.B. Thomas, A mixed precision Monte Carlo methodology for reconfigurable accelerator systems, Proc. ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), pp. 57-66, 2012.

Books and Book Chapters:

João M. P. Cardoso (UPORTO), Pedro C. Diniz (INESC-ID), Zlatko Petrov (HON), Koen Bertels (TUD), Michael Hübner (KIT), Hans van Someren (ACE), Fernando Gonçalves (CW), José G. Coutinho, George Constantinides (ICSTM), Bryan Olivier (ACE), Wayne Luk (ICSTM), Juergen Becker (KIT), Georgi Kuzmanov (TUD), Florian Thoma (KIT), Lars Braun (KIT), Matthias Kühnle (KIT), Razvan Nane (TUD), Vlad-Mihai Sima (TUD), Kamil Krátký (HON), José C. Alves (UPORTO), and João C. Ferreira (UPORTO), “REFLECT: Rendering FPGAs to Multi-Core Embedded Computing”, book chapter in Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, João M. P. Cardoso (UPORTO), and Michael Hübner (KIT), (eds.), Springer, 309 p., Springer; 1st Edition (August 31, 2011), ISBN: 978-1461400608.
"Compilation and Synthesis for Embedded Reconfigurable Systems - An Aspect-Oriented Approach", João M. P. Cardoso (UPORTO), Pedro C. Diniz (INESC-ID), Zlatko Petrov (HON), José G. Coutinho, George Constantinides (ICSTM), to be published by Springer, 2013.

Master Thesis:

João D. V. Teixeira, "Acceleration of a Stereo Navigation Application for Autonomous Vehicles", MSc Thesis on Electrical and Computer Engineering, Dept. of Electrical and Computer Engineering (DEEC), Faculty of Engineering (FEUP), University of Porto, Sept. 28th, 2011. Supervisor: José Carlos Alves, Co-supervisor: João Canas Ferreira
Joaquim D. C. Azevedo, "Acceleration of a 3D Path-Planning Algorithm for Unmanned Autonomous Vehicles (UAVs)", MSc Thesis on Electrical and Computer Engineering, Dept. of Electrical and Computer Engineering (DEEC), Faculty of Engineering (FEUP), University of Porto, July 15th, 2011. Supervisor: José Carlos Alves, Co-supervisor: João Canas Ferreira
Pedro Miguel dos Santos Pinto, “Suggesting Loop Unrolling Using a Heuristic-guided Approach,” MSc in Informatics Engineering (MIEIC), Department of Informatics Engineering (DEI), Faculty of Engineering of the University of Porto (FEUP), Porto, July 17, 2012. Supervisor: João M. P. Cardoso
Luis Filipe Cunha Pedrosa, “Specifying and Processing Non-Functional Requirements,” MSc in Informatics Engineering (MIEIC), Department of Informatics Engineering (DEI), Faculty of Engineering of the University of Porto (FEUP), Porto, February 17, 2012. Supervisor: João M. P. Cardoso
José Carlos Pereira de Sá, "FPGA Implementation of an Autonomous Navigation Algorithm with Dynamic Adaptation of Quality of Service", MSc Thesis on Electrical and Computer Engineering, Department of Electrical and Computer Engineering (DEEC), Faculty of Engineering (FEUP),University of Porto, October 12th, 2012 Supervisor: João C. Ferreira, Co-supervisor: José C. Alves
Carla Sofia Inácio Brito, "FPGA Implementation of the G.279 Speech Encoder", MSc Thesis on Electrical and Computer Engineering, Department of Electrical and Computer Engineering (DEEC), Faculty of Engineering (FEUP),University of Porto, ongoing (expected conclusion: February 2013) Supervisor: João Canas Ferreira, Co-supervisor: José Carlos Alves

Industry Engagement:

Meeting with the REFLECT project's IAB member - Texas Instruments, Gmbh (TI) - at the 2012 Embedded World Conference in Nürenberg, Germany to discuss the suitability of using DSP-based and heterogeneous development board from TI as target of the REFLECT tool chain. In attendance at this meeting were Dominique Poissonnier (Director of Partnership Program), Jochen Shyma (Business Development Manager) and Jürgen Mathes (Senior Field Applications Engineer) in addition to Pedro C. Diniz (INESC-ID).
Meeting with the REFLECT project's IAB member - MSC-GE - at the 2012 Embedded World Conference in Nürenberg, Germany to discuss the involvement of MSC-GE in the REFLECT IAB. In attendance at this meeting were Andreas Swartzrauder (Business Development Manager), Luca Cattaneo (Area Technical Manager) and Olaf Jürgens (Senior Field Applications Engineer) in addition to Pedro C. Diniz (INESC-ID).
Pedro C. Diniz (INESC-ID), presented the video on REFLECT. Participation in the Design Automation Conference (DAC) University Booth, with the video demo made by Ricardo Nobre (UPORTO) and José Gabriel de F. Coutinho (ICSTM). San Francisco, EUA, June 5-6, 2012.
Pedro C. Diniz (INESC-ID), met and presented the REFLECT tool chain to technical staff members from Xilinx Corp., FORTE Design Systems and Calypto Inc., at the Exhibit Session as part of the ACM/IEEE Design Automation Conference (DAC) held in San Francisco, CA, EUA on June 5 and June 6, 2012.